Semiconductor Test Engineer

Semiconductor Test Engineer Overview

Fractile is on a mission to revolutionize the hardware that powers advanced AI systems. Founded in 2022, the company focuses on overcoming the limitations of inference speed in AI applications. We are currently looking for a skilled Semiconductor Test Engineer to lead the development and implementation of manufacturing test solutions for our next-generation AI accelerator devices.

Key Responsibilities

• Develop and maintain automated test equipment (ATE) test programs for AI accelerator chips aimed at high-volume manufacturing.
• Implement manufacturing test content for advanced CMOS designs, including high-speed logic, SRAM, DRAM, and high-speed IO blocks.
• Create and debug structural and functional test content such as scan/ATPG, LBIST, MBIST, JTAG, and HSIO tests.
• Bring up first silicon on ATE, which includes pattern debugging, tester correlation, shmooing, and corner analysis.
• Support testing of high-speed interfaces like PCIe Gen6 and multi-GHz LPDDR, including at-speed tests and margining features.
• Conduct silicon characterization and failure analysis to identify yield limiters and defect mechanisms.
• Optimize test coverage, test time, and cost while ensuring manufacturing robustness.
• Collaborate with design for test (DFT) and design teams to enhance testability and address coverage gaps.
• Work with outsourced semiconductor assembly and test (OSAT) partners and external collaborators on test program execution and debugging.
• Support advanced packaging test flows, including die-to-die interconnect testing and package-level thermal considerations.
• Contribute to the documentation of test programs, debugging procedures, and manufacturing release materials.
• Assist in qualification, reliability testing, and ramping up high-volume manufacturing.

Required Qualifications

• A minimum of 5 years of hands-on experience in semiconductor test engineering.
• Proven experience in developing ATE test programs, preferably with Advantest 93K, Teradyne, or similar.
• Strong understanding of design for test (DFT) methodologies, including scan, ATPG, MBIST, and LBIST, as well as memory test techniques.
• Experience in debugging silicon issues at the tester level and correlating failures to design or process causes.
• Familiarity with advanced CMOS nodes and the challenges associated with production testing.
• Ability to collaborate effectively in a cross-functional engineering environment.

Preferred Qualifications

• Experience testing AI accelerators, GPUs, networking ASICs, or other high-performance compute ICs.
• Experience with PCIe Gen5/Gen6, LPDDR4/5/6, or other high-speed interfaces.
• Exposure to advanced packaging, chiplets, or multi-die test flows.
• Experience improving yield, reducing test time, or optimizing cost in high-volume manufacturing.

What We Offer

• Competitive salary that reflects experience and the specialized nature of the role.
• Equity and ownership opportunities to share in value creation.
• Comprehensive benefits package including Private Medical, Dental, and Vision insurance.
• Contributory pension plan.
• 25 days of holiday plus bank holidays.
• Life and Critical Illness Insurance.

At Fractile, we believe that the hardest problems are best solved by a diverse range of minds. We are committed to Equal Employment Opportunity and strive to create an inclusive environment. Join us in our journey to increase the clock speed of global progress, one chip at a time.

Degree Requirement: Not Specified

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