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Senior Verification Engineer

July 25, 2026 by admin

  • Full Time
  • Cambridge
  • Posted 2 weeks ago
IC Resources Recruitment

IC Resources Recruitment

Senior Verification Engineer Overview

Company Name IC Resources Recruitment
Job Role Senior Verification Engineer
Qualifications Not Specified
Category IT Jobs
Job Type Full Time
Location Cambridge

Join a leading British technology company known for its innovative computing platforms that serve millions of developers, educators, engineers, and hobbyists globally. The company is focused on high-performance and accessible computing, establishing itself as a leader in embedded and edge computing technologies. As they expand their in-house ASIC capabilities to support an exciting product roadmap, they are looking for a Senior Verification Engineer to join their team in Cambridge.

The Opportunity

As a Senior Verification Engineer, you will be responsible for the planning and execution of IP and chip level verification. You will work closely with the design team, developing detailed verification plans and creating test benches from scratch or utilizing existing verification components.

Responsibilities

  • Take ownership of IP and chip level verification planning and execution.
  • Interact regularly with the design team to ensure alignment on verification processes.
  • Compose detailed verification plans tailored to specific projects.
  • Create test benches from scratch or utilize shared verification components.

Requirements

  • Hands-on experience with at least three verification projects.
  • Proficiency in creating test benches from scratch using SystemVerilog, Python, or UVM.
  • Experience in writing embedded C, preferably for Cortex M-class microcontrollers.
  • Strong technical understanding of at least one complex IP protocol such as PCIe, HDMI, USB, SDIO, or AMBA bus architectures.
  • Ability to write functional coverage and SystemVerilog Assertions (SVA).
  • Good understanding of design and front-end processes.
  • Experience with low-power simulations and SoC verification concepts including memory caches, DMA, and security architecture (e.g., TrustZone).
  • Familiarity with Cadence simulation tool flow, including gate-level simulation.
  • Knowledge of scripting languages such as Bash, TCL, Make, and YAML.

Benefits

  • Excellent compensation package.
  • Various non-monetary benefits.
  • Opportunity to work in a supportive and innovative environment.

This position requires full-time onsite attendance in Cambridge. If you are interested in this opportunity, please contact Rachel Mason at IC Resources.


Degree Requirement: Not Specified

Visa Sponsorship May be

To apply for this job please visit ic-resources.com.

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