Principal ASIC Design Engineer

Principal ASIC Design Engineer Overview

Join a leading British technology company that specializes in designing innovative computing platforms utilized by millions globally. This organization is recognized for its commitment to accessible and high-performance computing, and is currently expanding its in-house ASIC capabilities to support a promising product roadmap.

As a Principal ASIC Design Engineer, you will be an integral part of a growing ASIC team, engaging in the development of next-generation silicon products. This position offers the opportunity to work within a small, collaborative team, providing exposure to the entire silicon development lifecycle, from architecture and specification to design, verification, implementation, testing, and product qualification.

Key Responsibilities

• Take charge of front-end development tasks, overseeing the process from specification to design, verification, and implementation.
• Define, specify, configure, and integrate both IP and system-level functionalities.
• Lead the planning and execution of verification processes for complex System-on-Chip (SoC) and Microcontroller (MCU) designs.
• Work closely with software teams to ensure effective integration between hardware and software.
• Support FPGA platforms utilized for software development and pre-silicon validation.
• Collaborate with implementation teams to address challenges related to timing, power, and physical design.
• Contribute to the overall ASIC development workflow to guarantee successful product delivery.

Requirements

• A minimum of 10 years of experience in SoC or MCU architecture and design.
• Demonstrated success in delivering at least one silicon tape-out where you had architectural control over a complete chip or a significant subsystem.
• In-depth knowledge of modern microcontroller and processor architectures, including real-time operations and deterministic interrupt handling.
• Experience with low-power architectures and memory hierarchies such as Flash and SRAM.
• Familiarity with common peripheral interfaces like SPI, I²C, UART, USB, ADC/DAC, timers, and programmable I/O fabrics.
• Strong understanding of broader SoC architecture, including AXI, AHB, and APB interconnects, cache hierarchies, DMA, and memory controllers.
• Knowledge of security architectures and the integration of operating system-class subsystems with real-time domains.
• A solid grasp of practical chip implementation realities, including RTL design (SystemVerilog), verification methodologies (UVM, formal, emulation/FPGA), DFT, timing closure, power analysis, and physical design constraints.
• Proficiency in scripting languages such as Bash, Python, or Tcl.

Benefits

• An attractive compensation package.
• Various non-monetary benefits.

This role is based in Cambridge and requires full-time onsite attendance. If you are an experienced IC Design Engineer who enjoys taking ownership and working across multiple disciplines, this is an excellent opportunity to join a company poised for significant growth.

Degree Requirement: Not Specified

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