ARM
Principal Engineer, DFT Overview
| Company Name | ARM |
| Job Role | Principal Engineer, DFT |
| Qualifications | Bachelor’s |
| Category | IT Jobs |
| Job Type | Full Time |
| Location | Cambridge |
Join Arm’s Central Engineering DFT Architecture and Methodology team, where you will play a pivotal role in defining the future of Design-for-Test across Arm’s CPUs, GPUs, System IP, AI accelerators, and next-generation SoCs. This position involves developing DFT architectures, methodologies, and implementation flows that facilitate high-quality, scalable test solutions across various platforms.
As a Principal/Senior Principal DFT Architect/Engineer, your responsibilities will include:
- Defining DFT architecture for next-generation Arm IPs and SoCs, particularly in emerging AI and hyperscale computing sectors.
- Developing and driving scalable DFT methodologies and implementation flows across multiple engineering organizations.
- Evaluating new DFT technologies and leading investigations to address future product challenges.
- Collaborating with architecture, implementation, verification, and physical design teams to establish robust DFT solutions.
- Working closely with EDA vendors to influence product roadmaps and promote the adoption of new technologies.
- Producing architecture specifications, methodology documentation, and deployment guidance.
- Providing technical leadership and mentorship across project teams.
- Supporting strategic engagements with customers, ASIC partners, and industry standards bodies.
- Contributing to technical publications, patents, and industry conferences.
To qualify for this role, you should possess:
- Extensive experience as a Principal or Senior Principal engineer in Design-for-Test architecture and implementation.
- A strong understanding of modern SoC DFT methodologies, including scan architecture, scan compression, ATPG, fault simulation, at-speed testing, Memory BIST, Logic BIST, JTAG/IEEE 1149.1, IJTAG/IEEE 1687, and DFT verification/debug.
- Experience in developing reusable DFT methodologies or automation tools.
- Familiarity with Siemens Tessent, Synopsys, and/or Cadence DFT solutions.
- Strong scripting skills in Perl, Tcl, and/or Python, along with Linux/Unix expertise.
- Excellent problem-solving and analytical skills.
- Strong communication skills to influence technical direction across teams.
- A degree (or equivalent) in Electronic Engineering, Computer Engineering, or a related discipline.
Preferred qualifications include:
- Experience defining DFT architecture for large-scale SoCs.
- Knowledge of heterogeneous compute systems, AI accelerators, or hyperscale computing products.
- Familiarity with IEEE 1500, IEEE 1838, and advanced IJTAG methodologies.
- Experience with Streaming Scan Network (SSN) and chiplet/3DIC architectures.
- Knowledge of silicon bring-up and production testing.
- Experience working directly with EDA vendors on new technology development.
- A record of patents, conference publications, or contributions to industry standards.
Arm offers a hybrid working environment that supports both high performance and personal wellbeing, allowing teams to determine their own working patterns based on their needs. Please note that no relocation package is available for this role. If skilled worker sponsorship is required, Arm will cover the employer’s costs associated with sponsorship, while the successful candidate will be responsible for their application fees and Immigration Health Surcharge.
Arm is an equal opportunity employer, committed to fostering a diverse and inclusive workplace. We welcome applicants from all backgrounds and do not discriminate based on race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or veteran status.
Degree Requirement: Bachelor’s
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To apply for this job please visit careers.arm.com.